Computer Architecture - Question and answer - 4

16. What is RISC architecture ?
RISC architecture consists of a large uniform register file, load and store architecture, simple addressing modes and uniform fixed-length instruction fields. Due to this characteristic, we achieve high performance, low code size, low power consumption and low silicon area. The machine instructions in RISC architecture are hardwired. RISC instruction operates only on register operands. RISC instruction executes faster as registers are placed in the processor chip which is faster available memory resource. RISC instruction performs memory to memory transfer via Load and Store instruction.

17. What is vertical microcode ?
Vertical microcode, each microinstruction is significantly encoded – that is, the bit fields generally pass through intermediate combinatory logic that, in turn, generates the actual control and sequencing signals for internal CPU elements (ALU, registers, etc.). This is in contrast with horizontal microcode, in which the bit fields themselves either directly produce the control and sequencing signals or are only minimally encoded. Consequently, vertical microcode requires smaller instruction lengths and less storage, but requires more time to decode, resulting in a slower CPU clock.

18. What is MESI protocol ?
The MESI protocol is a formal mechanism for controlling cache coherency using snooping techniques. Its acronym stands for modified, exclusive, shared, invalid and refers to the states that cached data can take. Transition between the states is controlled by memory accesses and bus snooping activity.

19. What is a virtual memory on a computer?
Virtual memory is a feature of an operating system that enables a computer to be able to compensate shortages of physical memory by transferring pages of data from random access memory to disk storage. This process is done temporarily and is designed to work as a combination of RAM and space on the hard disk.

20. What is the write-through method?
Write through is a storage method in which data is written into the cache and the corresponding main memory location at the same time. The cached data allows for fast retrieval on demand, while the same data in main memory ensures that nothing will get lost if a crash, power failure, or other system disruption occurs.